PJSDA05C-4 april 30.2010-rev.00 page . 1 features ? 80w power dissipation (8/20 s waveform) ? low leakage current,maximum of 1 a@5vdc ? very low clamping voltage ? iec61000-4-2 esd 15kv air, 8kv contact compliance ? in compliance with eu rohs 2002/95/ec directives mechanical data ? case: sot23-6l molded plastic ? terminals:solder plated, solderable per mil-std-750,method 2026 ? weight: 0.0005 ounce, 0.0141 gram ? marking : qcg tvs array quad for esd protection this penta tvs array has been designed to protect sensitive equipment against esd and to prevent latch-up events in cmos circuitry operating at 5vdc and below. this tvs array offers an integrated solution to protect up to 4 data lines where the board space is a premium. maximum ratings 6 5 4 1 fig.126 23 119 035 0.9 max. 12 30 electrical characteristics t j =25 o c parameter symbol value units peak pulse power (8/20 s waveform) p pp 80 w peak pulse current (8/20 s waveform) i pp 5.0 a esd voltage (hbm) v esd >25 kv operating temperature range t j -55 to + 150 o c storage temperature range t stg -55 to + 150 o c parameter symbol conditions min. typ. max. units reverse stand-off voltage v rwm ---5.0v reverse breakdown voltage v br i br =1ma 6.2 - 8.0 v reverse leakage current i r v r =5v --1 a clamping voltage (8/20 s) v c i pp =1a - - 12 v clamping voltage (8/20 s) v c i pp =4a - - 15 v off state junction capacitance c j 0vdc bias f=1mhz between i/o pins and pin 2 - 15 17 pf off state junction capacitance c j 5vdc bias f=1mhz between i/o pins and pin 2 - 7 10 pf
PJSDA05C-4 april 30.2010-rev.00 page . 2 fig 1-pulse waveform fig 1-pulse waveform fig 2- typical junction capacitance under bias 0 5 10 15 20 25 012345 v r , reverse bias voltage (v) c j , junction capacitance (pf) fig 3- typical leakage current vs junction temperature 1 10 100 0 20 40 60 80 100 120 140 160 t , junction temperature ( c) j o i r , reverse leakage current (na) fig 4- clamping voltage vs peak current 0 5 10 15 20 25 30 100 90 80 70 60 50 40 30 20 10 0 time, s percent of i p p 0 1 2 3 4 5 6 8 9 10 11 12 vc , clamping voltage(v) ipp, peak current (a) ,8/20 sec 50% of i pp@20 s rise time 10-90%-8 s
page . 3 april 30.2010-rev.00 mounting pad layout ? packing information t/r - 10k per 13" plastic reel t/r - 3k per 7? plastic reel order information legal statement copyright panjit international, inc 2010 the information presented in this document is believed to be accurate and reliable. the specifications and information herein are subject to change without notice. pan jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. pan jit products are not authorized for use in life support devices or systems. pan jit does not convey any license under its patent rights or rights of others. PJSDA05C-4
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